A recent AMD patent, US19/201,497 titled “High-bandwidth memory module architecture,” is making the rounds again, with posts like this one on Reddit prompting all kinds of speculation about the “new” HB-DIMM memory technology that AMD is preparing. However, AMD is probably not preparing anything new; Instead, the new patent is actually a continuation of an older one that dates to 2022. The technology the company outlines has already been superseded by the new MRDIMM tech that’s already shipping and supported by AMD.
The original patent, known as US12300346B2 and also titled “High-bandwidth memory module architecture,” was superseded in 2023 by US20230178121A1, which is the specific document extended by the “new” filing that was actually published back in July. In other words, by no means is this a novel technology, and AMD’s recent activity with these patents is almost assuredly a form of “bureaucratic housekeeping” — paper shuffling intended to help protect AMD’s intellectual property.
Multiple companies independently developed this idea; SK hynix pursued it in collaboration with Intel and Renesas, presenting a proposal called MCR-DIMM in late 2022. That was after AMD had already filed its patent on HB-DIMM, although the filing wasn’t public at that time. It wouldn’t do to have two competing, incompatible standards, so JEDEC got together with the two to standardize what we now have as MRDIMMs, or Multiplexed-Rank Dual Inline Memory Modules. MRDIMMs consolidate the ideas of MCR-DIMM and HB-DIMM into one standard form.
MRDIMMs aren’t a hypothetical future technology. They’ve already been available on the market for upwards of a year now, as they’re supported in Intel’s Xeon 6 family of server CPUs (formerly Granite Rapids). Phoronix recently tested the performance gains against standard DDR5 RDIMMs at 6400 Mbps, and while the overall gains were small, certain memory-intensive workloads like the High Performance Conjugate Gradient (HPCG) found significant gains, while memory latency actually saw a tiny, margin-of-error improvement.
Does this recent patent filing indicate that AMD will still pursue HB-DIMM? Probably not. Fundamentally, the technologies are very similar, and AMD has already voiced its intent to support JEDEC’s MRDIMM open standard. The company’s Zen 6-based EPYC ‘Venice’ processors are expected to use MRDIMMs — potentially second-generation MRDIMMs — to reach the lofty 1.6 TB/second per-socket memory bandwidth spec that Dr. Lisa Su teased at AMD’s Advancing AI event in June.
If that was indeed meant to be a single-socket bandwidth number, then with the rumored sixteen-channel (1024-bit) memory interface of ‘Venice’, a transfer rate of 12,800 Mbps would get you directly to 1.6 TB/second. That happens to be exactly the transfer rate that JEDEC promised for second-generation MRDIMMs, so there’s the source for our speculation.
Those hot-clocked DDR5 modules won’t come cheap, though. Existing MRDIMMs are already extremely expensive, with a cost-per-gigabyte that is between 28% and 114% higher than standard, slower-clocked DDR5 RDIMMs, depending on the specific comparison being made. We’re looking at retail pricing, which usually isn’t what server operators pay, but the point is, you’re looking at easily $100 to $150 extra per module, which is brutal when you need to fill eight, ten, twelve, or sixteen memory channels in a single server. The second-gen 12,800 Mbps stuff will likely be even more.
So, in summary: No, AMD (probably) isn’t about to whip out some new high-speed memory technology. This stuff has been talked about for a few years already, and in fact, we actually covered HB-DIMM and MRDIMMs right here on this very website in the past. Here’s hoping this technology could filter down to consumer systems, particularly if those rumors about AMD’s new chiplet APUs are true.
Follow Tom’s Hardware on Google News, or add us as a preferred source, to get our up-to-date news, analysis, and reviews in your feeds. Make sure to click the Follow button!